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SMBus/I 2 C Interfaced 9-Port,
Level-Translating GPIO and LED Driver with CLA
Table 3. Configuration Register (0x26)
REGISTER BIT
D7
D6
D5
D4, D3, D2
D1
D0
DESCRIPTION
Interrupt status flag
(read only)
Transition flag
(read only)
Reserved
Blink prescalor bits
RST timer
RST POR
VALUE
0
1*
0
1*
—
0/1
0*
1
0*
1
FUNCTION
An interrupt has occurred on at least one interrupt enabled input port.
No interrupt has occurred on an interrupt enabled input port.
A transition has occurred on an input port.
No transition has occurred on an input port.
Reserved
Blink timer bits, see Table 10.
RST does not reset counters PWM/blink
RST resets PWM/blink counters
RST does not reset registers to power-on-reset state.
RST resets registers to power-on-reset state.
* Default state.
Table 4. Configuration Register (0x27)
REGISTER BIT
D7
D6, D5, D4
D3
D2
D1
D0
DESCRIPTION
Bus timeout
Reserved
P3/OSCOUT
P2/OSCIN
P1/INT output
Input transition
VALUE
0
1
0
1
0
1*
0
1*
0
1
0
FUNCTION
Enables the bus timeout feature.
Disables the bus timeout feature.
Reserved
Reserved
Sets P3 to output the oscillator.
Sets P3 as a GPIO controlled by register 0x03.
Sets P2 as the oscillator input.
Sets P2 as a GPIO controlled by register 0x02.
Sets P1 as the interrupt output.
Sets P1 as a GPIO controlled by register 0x01.
Set to 0 on power-up to detect transition on inputs.
* Default state.
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9
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